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[OS program] ddr2 VHDL原代码

Description: ddr2的仿真代码
Platform: | Size: 833330 | Author: kabtechnology@126.com | Hits:

[ARM-PowerPC-ColdFire-MIPS] Altera的IP源码8237

Description: 名鼎鼎的Synopsys公司出的8051IP Core VHDL语言编写，能被keilC51支持-renowned name of the company Synopsys 8051IP Core VHDL language, support can be keilC51
Platform: | Size: 207872 | Author: 上面的 | Hits:

[Graph Drawing] VGAsingl

Description: fpga显示控制器，利用vhdl语言实现，只能显示8色。-fpga display controller, using vhdl language, the only shows that eight colors.
Platform: | Size: 1024 | Author: lyc | Hits:

[Compress-Decompress algrithms] DDR2_sdram

Description: DDR2 的控制器，它是由LATTICE的编译器生成。-DDR2 controller, it is by the compiler-generated LATTICE.
Platform: | Size: 966656 | Author: 李国 | Hits:

[VHDL-FPGA-Verilog] DDR2_module_VHDL_test(Rev0.1)

Description: ddr 2 接口读写测试模块 ddr 2 接口读写测试模块 -ddr 2 interface test module ddr 2 read and write interface to read and write test module
Platform: | Size: 125952 | Author: 骑士 | Hits:

[Other] LVDS

Description: 关于lvds的详细介绍和讨论，非常适合初学者使用-LVDS details on the presentations and discussions, is very suitable for beginners to use
Platform: | Size: 89088 | Author: 周洲 | Hits:

[VHDL-FPGA-Verilog] zbt_rd_vhdl_str_v1.0.0

Description: ddr2 controller功能控制,里面有四个模块-ddr2 controller functions to control, which has four modules
Platform: | Size: 1688576 | Author: li ji wei | Hits:

[VHDL-FPGA-Verilog] DDR2Controller

Description: DDR2 Controller DDR2 Controller
Platform: | Size: 312320 | Author: tg | Hits:

[VHDL-FPGA-Verilog] ddr2sdram_spartan3s700an.tar

Description: It is a first time code being developed to designers who want to get your DDR2 SDRAM on-board in Spartan 3AN Starter Kit - Diligent fully working.-It is a first time code being developed to designers who want to get your DDR2 SDRAM on-board in Spartan 3AN Starter Kit- Diligent fully working.
Platform: | Size: 1488896 | Author: under | Hits:

[VHDL-FPGA-Verilog] OpenSPARC_DDR2_controller_RTL_Files

Description: 基于FPGA的DDR2控制程序，用verilog编写的。-FPGA-based DDR2 control procedures, prepared by using Verilog.
Platform: | Size: 30720 | Author: 王头 | Hits:

[Embeded-SCM Develop] ddr_ddr2_sdram

Description: 基于NIOS II的ddr2控制器,配有详细的文档,经验证后可使用.-NIOS II based on the DDR2 controller, equipped with detailed documentation, the experience can be used after certification.
Platform: | Size: 3486720 | Author: Jackie | Hits:

[Software Engineering] fpga-pinball_for_c

Description: VHDL 基于FPGA 和VGA 接口的应用设计-vhdl
Platform: | Size: 223232 | Author: xietianjiao | Hits:

[Other] CODE

Description: DDR2源代码 DDR2源代码-ddr2 source code ddr2 source code ddr2 source code
Platform: | Size: 299008 | Author: 司炯 | Hits:

[Other] Micron_DDR

Description: DDR2 SDRAM 颗粒初始化以及读写操作时序-Particles as well as the DDR2 SDRAM initialization timing to read and write operations
Platform: | Size: 432128 | Author: robert.wang | Hits:

[VHDL-FPGA-Verilog] Xil3SD1800A_MIG_simplifiedUI_vlog_v92

Description: verilog 实现的spartan 3A dsp start kit DDR2 SDRAM 控制器-verilog achieved spartan 3A dsp start kit DDR2 SDRAM controller
Platform: | Size: 908288 | Author: ma yirong | Hits:

[Documents] ddr2_sdram_controller

Description: 关于DDR2 SDRAM 控制器的相关论文资料-ddr2_sdram_controller
Platform: | Size: 5675008 | Author: 王颖伟 | Hits:

[VHDL-FPGA-Verilog] s3ask_ddr2

Description: DDR2-400样例源代码，用于Xilinx Spartan 3A/3AN Starter Kit-DDR2-400 sample source code for Xilinx Spartan 3A/3AN Starter Kit
Platform: | Size: 2612224 | Author: Joe Zhu | Hits:

[VHDL-FPGA-Verilog] mcb_read_write

Description: 赛灵思 DDR2 用户接口程序 原创。希望对各位有用。-Xilinx DDR2 original user interface program. You want to be useful.
Platform: | Size: 2048 | Author: wenchunhong | Hits:

[VHDL-FPGA-Verilog] user_design

Description: spartan3a-ddr2 (16bits 333M)
Platform: | Size: 10116096 | Author: lhx | Hits:

[VHDL-FPGA-Verilog] ddr2

Description: ddr2的功能控制模块，3部分，只要调取就可以。-ddr2 control codes
Platform: | Size: 5120 | Author: wenxin | Hits:
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